CpSc 372

Exam 2

 

Name______________________________________________

 

Answer any FOUR of the five questions. Place a large X on the question you are omitting. If you answer all five, the one on which you score the best will NOT be counted. All questions are counted the same: 25 points each. Answer all parts of each question.

 

You can not have a laptop in the exam. You may have the class notes, handouts, copies of submitted homework. You have from 12:30 am until 1:45am for the exam.


 

 

  1.  
    1. What are the links between reqspec requirements, verify verification activities and the AADL model of a system?

 

    1. Which properties does the command pattern enhance and which does it degrade?

 

    1. If class B inherits from class A, the most efficient design for test classes is to have the test class for B to inherit from the test class for A. What do we mean by efficient in this case?   

 

a.      “for” statements in reqspec link to AADL files; “for” statements in verify link to reqspec files

b.     Enhances modularity and flexibility; degrades performance

c.      The least amount of redundant code, the least effort to change/maintain

 


d.      

  1.  

a.      With an iterative, incremental process model, what are the differences between an iteration and an increment?

 

    1. What are the important behavior differences between MVC and MVP?

 

    1. Give 2 uses of the Singleton pattern in a typical app.

 

 

a.      An increment is an additional unit of functionality; an iteration is a single pass through the tasks in the development process

b.     The flow of control – the Model talks directly to the view in MVC but not in MVP

c.      Login procedure and representing an open file

  1.  

 

    1. In a review of an AADL model how would “coverage” be computed?
    2. Describe a project risk related to design. Be certain to include all 3 parts of a full risk statement.
    3. All the process models contain the same basic tasks: requirements analysis, architecture design,…. List 2 characteristics that do change from one process model to the next?  

 

a.  The number of ports or flows that have participated in a scenario.

b.  There is a risk that 2 components may be too tightly coupled which would result in increased time required to modify the system resulting in increased cost or delay.

c.  1. How many times a task may be performed 2. The level of abstraction used in a given pass through the tasks.


 

 

  1.  
    1. We keep specifications separate from implementations. Why? How in AADL?
    2. The requirements for a program must be satisfied by the specifications of the components that make up the program. How is the traceability between requirements and specifications established and recorded?  
    3. RUP is an iterative incremental process model. How do the rows and columns in the traditional RUP table correspond to the iterations and increments.

 

a.      So that we can change how a component accomplishes its job without changing how it integrates with the rest of the system.

b.     A recspec file uses a “for” statement to reference an AADL file in which the specification is given.

c.      The row is an iteration and a group of rows is an increment.


 

 

 

  1.  
    1. Assume a system contains two components, A and B, which are tightly coupled. How can the system design be modified to reduce coupling?

 

    1. List one variation mechanism, other than inheritance, used in developing assets for a software product line. Classify it as either static or dynamic, and then explain why it is (static or dynamic).

 

    1. Describe how the latency property for a system can be represented in an AADL model and describe how the Latency Analysis method in OSATE computes the latency of an end-to-end flow.

 

a.      Introduce a third component that represents the common behavior and have A and B interact with the new component.

b.     Substitution – usually static but can be dynamic; is static in that one element is substituted for another at design time

c.      Each flow segment and port can have a latency property attached to it. The Latency Analysis method traverses each end-to-end flow path and sums all of the latency annotations for that path. The result is added to a spreadsheet returned as a report.