CPSC 330 - Fall 2005
Homework 1
Due by class time on Friday, September 9
1. Clock cycle time (or clock period) is the reciprocal of clock frequency.
Fill in the following table.
clock clock
year processor frequency cycle time
1949 EDSAC 500 KHz ________
1978 Intel 8086 ________ 200 nsec
1993 Intel Pentium 66 MHz ________
1994 PPC 601 100 MHz 10 nsec
1998 PPC 750 ________ 3 nsec
2000 AMD Athlon 1 GHz 1 nsec
2004 PPC 970 2.5 GHz ________
2004 Intel Pentium 4 3.6 GHz ________
2. A keychain storage device (jump drive) writes at 0.85 MB/sec. How long will
it take to transfer a 4.25 MB file to the device?
3. Consider a weather prediction model with the following dimensions
120 x 120 2-dimensional grid points, 45 vertical layers
a) If each grid point in each layer requires 1,000 instructions to perform
the necessary calculations for one time step, how many total instructions
are required for the model to run for 100 time steps?
b) If a computer can process 2 billion instructions per second (2000 MIPS),
how long will the model take to run those 100 time steps?
c) If the model resolution is increased to 320 x 320 2-dimensional grid
points and 60 vertical layers, how long will the model take to run 100
time steps?
4. (a) What is the execution time for a program that executes 10 billion
instructions on a processor with an avg. CPI of 5.0 and a clock rate
of 2 GHz?
(b) What is the MIPS value?
5. Question 4.7 on p. 273 of your text.
Suppose you wish to run a program P with 7.5 billion instructions on a
5 GHz machine with a CPI of 0.8.
(a) What is the expected CPU time?
(b) When you run P, it takes 3 seconds of wall clock time to complete.
What is the percentage of the CPU time P received?
6. Consider the following instruction set workload and cycle values.
type | freq cycles
-------+--------------
alu | 0.5 1
branch | 0.2 2
ld/st | 0.3 5
(a) What is the average CPI?
(b) If the clock rate is 2.4 GHz, what is the MIPS value?
(c) Consider a proposed change in processor design in which the clock
rate can be increased to 3.6 GHz but the CPI values have to change
to those in the table below. Is the proposed design faster than
the original design in part (b)? If so, by what factor?
type | freq cycles
-------+--------------
alu | 0.5 1
branch | 0.2 5
ld/st | 0.3 11
7. Questions in the Chapter 4 "For More Practice" file on your text's CD-ROM.
(a) question 4.38
You are the kead designer of a new processor. The processor design
and compiler are complete, and now you must decide whether to produce
the current design as it stands or spend additional time improving it.
You discuss this problem with your hardware engineering team and arrive
at the following options:
a. Leave the design as it stands. Call this base computer Mbase. It
has a clock rate of 500 MHz, and the following measurements have
been made using a simulator:
instruction class | CPI frequency
-------------------+----------------
A | 2 40%
B | 3 25%
C | 3 25%
D | 5 10%
b. Optimize the hardware. The hardware team claims that it can
improve the processor design to give it a clock rate of 600 MHz.
Call this computer Mopt. The following measurements were made
using a simulator for Mopt:
instruction class | CPI frequency
-------------------+----------------
A | 2 40%
B | 2 25%
C | 3 25%
D | 4 10%
What is the CPI for each computer?
(b) question 4.39
What are the native MIPS ratings for Mbase and Mopt?
(c) question 4.40
How much faster is Mopt then Mbase?