Coverage: Sections 8.1-8.5, 8.7-8.12 (8.6 not covered)
Sections 12.2-12.15, 13.1-13.9 (12.1 and 13.10-13.11 not covered)
Sections 14.1-14.7, 14.9-14.12 (14.6 not covered)
1. Be able to define or match these terms.
Boolean algebra
Boolean equation (logic equation)
truth table
minterm
product term
sum of products
sum of minterms
Kmap (Karnaugh map)
DeMorgan's laws
don't care
logic circuit
combinational circuit
sequential circuit
gate
invertor
NOT, AND, OR, NAND, NOR, XOR, XNOR
universal gate
two-level circuit
programmable logic array (PLA)
encoder
priority encoder with "valid" output line
decoder
enable input
multiplexor (mux)
select lines
arithmetic logic unit (ALU)
asserted signal
propagation delay
number of gate levels (circuit depth)
critical path
latch
SR latch
metastability
clock
synchronous system
D flip-flop
register
finite state machine (FSM)
present state
next state
state encoding
one-hot encoding
state register
Moore machine
Mealy machine
SRAM
DRAM
FPGA
lookup table (LUT)
hardware description language
2. Be able to:
A. Construct a truth table for a simple gate (and, or, not, nand,
nor, ...) or for a logic expression.
B. Prove that one logic equation is equivalent to another using a
truth table (including the final statement that equal columns
means that the logic equations are equivalent).
C. Identify minterms and write a logic equation in sum-of-minterms
form.
D. State the two rules for using Karnaugh maps to simplify logic
equations (from section 13.2).
E. Use a Karnaugh map to simplify a four-variable (or less) logic
function or a truth table that may contain don't care values.
F. Given a state diagram, derive the truth table, simplified logic
equations for the next state variable(s) and output variable(s),
and the sequential circuit.
G. Given a sequential circuit derive the logic equations for the
next state variable(s) and output variable(s), the truth table,
and the state diagram.
Answer questions such as those found in the pre-class activities, in-
class activities, and end-of-chapter questions.