CPSC 330 - Spring 2012
Homework 2
Due Monday, Feb. 20
Each student must turn in a separate set of homework solutions,
but you may work together in study groups with other students
from the class. Include the names of your study group members
on the solution set you submit.
Also, please provide sufficient space for your calculations and
answers so that grading will be easier.
Appendix C
1. (a) Show by truth table that: ~(A*B) != (~A) * (~B)
(b) Show by truth table the 3-variable version of de Morgan's Law
for or-ing: ~(A+B+C) = (~A) * (~B) * (~C)
Be sure to circle the appropriate two equal columns and indicate
that because the columns are equal, the two expressions that they
represent are equal.
(c) Show by algebraic manipulation the 3-variable version of de
Morgan's Law for and-ing: ~(A*B*C) = (~A) + (~B) + (~C)
For each step, give the name of a logic property (from the lecture
notes www.cs.clemson.edu/~mark/330/logic.txt) that justifies the
step. Note that you can use the 2-variable versions of DeMorgan's
Law in proving this 3-variable version.
2. Simplify the following Karnaugh maps for functions D, E, and F.
D \ BC
A \ 00 01 11 10
+----+----+----+----+
0 | 1 | 0 | 0 | 1 | D = fn(A,B,C) = ____________________
+----+----+----+----+
1 | 0 | 0 | 1 | 1 |
+----+----+----+----+
E \ BC
A \ 00 01 11 10
+----+----+----+----+
0 | 1 | d | 0 | d | E = fn(A,B,C) = ____________________
+----+----+----+----+
1 | d | 1 | 0 | 1 |
+----+----+----+----+
F \ CD
AB \ 00 01 11 10
+----+----+----+----+
00 | 1 | 1 | 0 | 0 | F = fn(A,B,C) = ____________________
+----+----+----+----+
01 | 1 | 0 | 0 | 0 |
+----+----+----+----+
11 | 1 | 0 | 0 | 1 |
+----+----+----+----+
10 | 1 | 1 | 0 | 1 |
+----+----+----+----+
3. To provide proper rounding for floating-point addition, three extra
bits are included in right shifts of fractions: guard, round, and sticky.
The least-significant of these, the sticky bit, stays one whenever a 1
bit is shifted through it. In designing the logic for a sticky bit,
let the following truth table define the actions for R (reset) and I
(input) on a D flip-flop.
R I Q(t) | Q(t+1)
----------+--------
0 0 0 | 0
0 0 1 | 1
0 1 0 | 1
0 1 1 | 1
1 d d | 0
(a) Five rows are shown (using d = don't care in the last row). If the
don't cares are expanded, how many total rows would there be in the
full table?
(b) Using a Karnaugh map for simplifying the expression, give the input
to the D flip-flop in terms of R, I, and Q(t).
(c) Draw the state diagram for the sticky bit logic from the table above.
There is no separate output signal.
4. Consider a state machine with two inputs, R and I (reset and in), that,
after a reset R, outputs a 1 on each second 1 that it receives on input
I. Reset causes any count of previous and current I=1 inputs to be
lost, and the counting of I=1 inputs starts in the subsequent clock
cycle after the reset signal goes back to 0.
That is, the state machine behaves like this
input R: 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0
input I: 0 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1 1 1 1 1
output S: 0 0 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 1
(a) Give the state diagram. (There should be only two states.)
(b) Give the state transition table with inputs R, I, current state
Q(t), next state Q(t+1), and output S.
(c) Give the simplified logic expressions for Q(t+1) and S.
(d) Extend the state transition table with J and K columns and, using
the JK excitation table, fill in the appropriate values for causing
the required state transitions.
(e) Give the simplified logic expressions for J and K.