Computer Science 464/664 - Section 1
Introduction to Computer Architecture
Spring 2004
This file can be found in http://www.cs.clemson.edu/~mark/464.html
Objectives: Survey of concepts and performance evaluation for
computer architectures.
Prerequisite: CPSC 330 or equivalent
Meetings: 1:25-2:15 MWF, Daniel Hall 408
Required Text:
J. Hennessy and D. Patterson,
Computer Architecture: A Quantitative Approach, third edition.
Online Appendices:
Appendix C - A Survey of RISC Architectures for Desktop, Server,
and Embedded Computers (PDF)
Appendix D - An Alternative to RISC: The Intel 80x86 (PDF)
Appendix E - Another Alternative to RISC: The VAX Architecture (PDF)
Appendix F - The IBM 360/370 Architecture for Mainframe Computers (PDF)
Appendix G - Vector Processors Revised by Krste Asanovic (PDF)
Appendix H - Computer Arithmetic by David Goldberg (PDF)
Instructor:
Mark Smotherman, 441 Edwards Hall, mark@cs.clemson.edu, 656-5878
Office Hours: 2:30-4 MW; also email or call
since I'm usually available at other times
Projects: There will be two required projects for graduate students.
-
Disk Benchmarking
-
SMP cache coherency
Undergraduate students (i.e., those enrolled in 464) are not required to
do the projects.
Extra Credit Projects:
Extra credit projects will not be accepted this semester.
Grading:
Undergraduate students:
Homework (20%), two in-class exams (50%), and final exam (30%).
Graduate students:
Homework (15%), projects (20%), two in-class exams (40%), and final exam (25%).
Homework and projects are due by 4:00 pm on due dates.
Projects can be turned in up to three days late; 1 day late = 10% penalty,
2 days late = 20% penalty, 3 days late = 40% penalty. Normal class attendance
is recommended but not graded; however, attendance at the scheduled exams is
required -- an absence will be counted as a zero unless you have an excused
absence. Please wait for up to 15 minutes should I be late
to class. Note that the last day to drop without record is January 21; last
day to drop without grades is February 27.
Clemson statement of Academic Integrity:
"As members of the Clemson University community, we have inherited Thomas
Green Clemson's vision of this institution as a 'high seminary of
learning.' Fundamental to this vision is a mutual commitment to
truthfulness, honor, and responsibility, without which we cannot earn the
trust and respect of others. Furthermore, we recognize that academic
dishonesty detracts from the value of a Clemson degree. Therefore, we
shall not tolerate lying, cheating, or stealing in any form."
Spring 2004 Topics
- Introduction to the course: processor and memory performance trends,
chip manufacturing, transistors, definition of "computer architecture",
von Neumann machine characteristics, later innovations,
selected historical machines
(computer performance trend in MIPS, John McCallum)
(disk and main memory prices, John McCallum)
(growth in microprocessor performance in MFLOPS, Jack Dongarra)
(processor memory gap, Jack Dongarra)
(transistor operation and fabrication notes)
(intro and historical overview notes)
- Chapter 1: markets, IC manufacturing factors for costs, cost vs. price,
MIPS, MFLOPS, benchmarks, use of means for summarizing performance
results, make frequent case fast, Amdahl's law, CPU time equation,
memory system effects, exploit parallelism
(chapter 1 notes)
(performance worksheet 1)
(performance worksheet 2)
(homework 1)
- Chapter 2: instruction sets measures, memory addresses,
endianness, alignment, example instruction sets, compilers
(chapter 2 notes)
(homework 2)
- Appendix H: floating point
(floating-point notes)
(CPSC 231 floating-point notes)
"What every computer scientist should know about floating-point
arithmetic", by David Goldberg
("An Interview with the Old Man of Floating-Point," reminiscences
elicited from William Kahan by Charles Severance)
(homework 3)
- Exam 1
(study guide)
- Appendix A: pipelining
(appendix A notes)
(homework 4)
- Chapter 3: dynamic instruction scheduling, superscalar processors
(chapter 3 notes)
- Chapter 4: static instruction scheduling, VLIW and EPIC processors
(chapter 4 notes)
(homework 5)
- Exam 2
(study guide)
- Chapter 5: caches
(chapter 5 notes)
(matrix multiply generator program)
- Chapter 6: multiprocessors, multithreaded processors
(chapter 6 notes)
(homework 6)
- Chapter 7: storage devices
(chapter 7 notes)
- Chapter 8: clusters
(chapter 8 notes)
- Final Exam Tuesday, April 27, 1:00-4:00 pm
(study guide)
Interesting Sites to Visit
(Please send me updates, corrections, and additions.)
- General
- IPF (IA-64)
- Recent microprocessors
- AMD64 (a.k.a. Intel EM64T)
- IBM Power 4
- IBM PowerPC G5 (PPC 970)
- Intel Pentium 4
-
Intel XScale
- Compilation
-
Intel Tech Journal: Overview of Intel IA-64 compiler
-
"Compiling for IA-64," Hans Mulder, video, May 1999
-
"Beyond EPIC: Semantic-Based Program Optimization Technology,"
Wen-mei Hwu, video, April 1999
-
"Itanium Performance Insights," Hwu, et al., MPF 2001
-
Intel Tech Journal: Efficient Exploitation of Parallelism on
Pentium III and Pentium 4 Processor-Based Systems
-
Instruction scheduling, Vivek Sarkar and Barbara Simons, video,
August 1999
-
"Compiler-Directed Synthesis of Hardware Accelerators,"
Scott Mahlke, video, April 2000
- Performance Tuning
- Architectural Design
- Bob Colwell,
"Things CPU architects need to think about", Stanford University
Computer Systems Laboratory, EE380 Colloquium Series, Feb. 18, 2004.
- Matt Reilly, "Designing an Alpha processor," IEEE Computer,
July 1999, pp. 27-34.
- Chuck Moore, "Managing the transition from complexity to elegance:
Knowing when you have a problem," IEEE Micro, Sept./Oct. 2003.
- CMOS Design
- William Grundmann, et al., "Designing high performance CMOS
microprocessors using full custom techniques," Proc. Design
Automation Conf., June 1997, pp. 722-727.
- Paul Gronowski, et al., "High-performance microprocessor design,"
IEEE Journal of Solid-State Circuits, May 1998, pp. 676-686.
- Anantha Chandrakasan, William Bowhill, and Frank Fox (Eds.),
Design of High-Performance Microprocessor Circuits. Wiley
/ IEEE Press, 2000.
- Verification
- Steve Mangelsdorf, et al., "Functional verification of the HP
PA 8000 processor," HP Journal, August 1997.
- Bob Bentley and Rand Gray, "Validating the Intel Pentium 4
processor," Intel Tech. Journal, quarter 1, 2001.
- John Ludden, et al., "Functional verification of the POWER4
microprocessor and POWER4 multiprocessor systems," IBM JRD,
2002, pp, 53-76.
[Mark's homepage]
[CPSC homepage]
[Clemson Univ. homepage]
mark@cs.clemson.edu