Mark Smotherman. Last updated February 2001.
9-wide "superinstruction" - one branch, 4 integer, 4 FP ops
two tag bigs on each 64-bit memory word: empty/full and wait/no-wait
based on research by Herb Sullivan and Ted Bashkow at Columbia University, which started in 1987
CHoPP Computer Corporation was incorporated in January 1979; renamed to ANTs with focus on OLTP software in February 1999.
(Bruce Lightner and Val Popescu worked on CHoPP and went on to establish Metaflow in 1985.)
selections from CHoPP section in Jack J. Dongarra and Iain S. Duff, "Advanced Architecture Computers," http://www.netlib.no/netlib/papers/advarch
Sullivan Computer Corporation
La Jolla, California
Lee Higbee, VP Research
The computer is under development by Sullivan Computer Corporation. The single processor is claimed to be several times faster than current supercomputers and will not require special coding techniques such as those required for vector processors, hypercubes, or other highly-parallel systems. The machine under current development is the Demonstration Unit (DU), a single processor version of the CHoPP 1. The CHoPP 1 will include up to 16 parallel processors. The features listed below highlight some features of the DU.
... Four address arithmetic and logic units (ALUs) and four computational functional units, each an ALU and floating point unit, support the 8 concurrent computations in each superinstruction. A zero delay branch is the ninth executable instruction. The central processing unit has multiple register sets to support many tasks in concurrent execution (multiprogramming).
... On the Livermore Loops, the DU is expected to perform over two times the CRAY X-MP.
... The machine is small and air cooled; it is compatible with most computer environments; it does NOT require special cooling systems. Much of the lowest level of the Operating System is in hardware, providing much lower O/S overhead.
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