Document List of ACS-related items in Kolsky collection at CHM June 3, 1965 (with additional dates of June 9 and July 9) draft of Large Scientific Computer Strategy, no author listed * apparently drafted in early July, buts purports to describe the work and opinions of a committee in July and August * handwritten notes from July appended June 9, 1965 handwritten notes on meeting in Oakland * overview of vision for ACS group * "~50 man group" * work with Livermore, maybe Los Alamos * location "get away from traditional approach" * "test ideas at LRL" * "initial build up - this summer" * "4Q65 freeze design" * "computer on floor 1H67" * "10 ns clock" * Tech Planning Committee to meet and will include Bertram, Cocke, Amdahl, and Kolsky July 20, 1965 memo from R.W. DeSio to Goldstine regarding presentation of Project Y to Los Alamos on July 11 * notes that there has been a "special working relationship with Livermore ... Livermore will have three or four of their people assigned full time and IBM will have space at Livermore for our people who may be spending time there" * however, Los Alamos reaction was "it appeared as if IBM had frozen specs on the next generation computer and were not sincerely interested in additional inputs" * send Paly and Bertram on July 27 August 3, 1965 handwritten notes from Arden House conference (46pp) * "air of destiny" * "not fixed or frozen" * "not to choose at this meeting" * "technology not decided" * "what will competition thru 1970 do?" * "Project Y ... Large FP Proc - execute more than 1 instr / machine cycle" * "lean machine cycle 6-7 levels / machine cycle" * "highly compilable (85% of object code efficiency)" * "32 arith regs (48 bits) / 31 index regs (24 bits)" * "transfer anticipation / multiple decoding / concurrent execution" * "load "execute ahead reg" ... [transfer] to execute ahead reg" * "Instr. distribution / scan 1 cycle / distribute each cycle thereafter / 1 Transfer / 2 arith + logic / 2 index or 2 load/store" * "design change being considered: increase burst rate from 2 to 4 instr/cycle (+ 1 Transfer) = 5" * "would like to test out of order" [multiple condition codes] * notes on letter from Bengt Carlson [Los Alamos] including "48 bit wd" * Amdahl on "Two Mountains" and system support problem - argues for 360 compatibility * technology "Phase II 4Q67 / 1 ns ckt ... 30-50 ckts/chip ... liquid cooled ... 16x16 board 27,000 ckts ... FP processor = 5 boards" [approx. equal sign] * Objectives: / 1968-9 delivery / 10 x 6800 on available sample probs" * notes indicate that a S/360 "Compatibility Resolution" would be a follow-up action item Nov. 16, 1965 handwritten notes, apparently of visit from Worlton (Los Alamos) * "goal: 1 instr ea 5 ns" * "2 opns/cycle average in arith." * "(cycle = 10 ns target)" [aprox. equal sign] * "(3 or 4 opns/cycle - incl indexing loads + stores)" * "ACS: 15-20x Mod 92 ... (300-400x STR)" [Stretch] Nov. 29, 1965 memo to file by R.C. Miller regarding visit from Worlton (Los Alamos) * "to clearly indicate that the system is in the architectural stage and that their participation is desirable to IBM" * "Dr. Amdahl presented the basic concepts of the system" * "performance goal of 200 to 400 million instructions per second" * Worlton presented vector operations * Worlton would not commit on 48 vs. 64 bit word size June 23, 1966 handwritten notes from presentation to NSA (12pp) * "start in 1964: 5 year program / 1000x increase / factor of 30-40 from technology" * "C. Blair 'should build something first? - a mistake to make great leap forward'" * "Max ... must go through stages - 360 will use later" * "160-200 MIP performance" * "12 1/2 cycle" * "4 instrs/cycle peak rate, 2 instr average" * "out of order execution - passing on hold ups / full back-up register set eg [loop around load A / use A] can load 2 As one in backup" * "2 limitations on out of order - / 6 instr buffers on A / 6 " " on X" * "condition register ... Branch is 'prepare to branch' / 'Exit flag'" * "skip inststrs - done in A + X units only / skip to next exit flag" * "interlock matrix" * "5"x5" modules ~20,000 circuits on each 1 1/2 kwatts / 400 amps / 10-15000 wires on each" * "chip carrier 140 mils (625 on the module)" * "8 mil shielded wire (coax 50 ohm) / regular wire - 2 mil discrete wire" * "6-7 hours to wire one 5"x5" / 1 hour to test" * "CSEF: Circuit Switch Emitter follower" * "7 circ levels/clock cycle" * "chips 60 mil x 60 mil x .6 mil / 30 circs per chip" * "2.4 watts per chip ave" * 10000 chips/plate / 300,000 circuits (if all used)" * "chip temp ~40 degrees C / freon 25 degrees C 2600 gallons/hour" * "design record keeping / use of macros (40 to 80 to be used)"" June 27, 1966 meeting report regarding NSA visit on June 23 * "Dr. Amdahl discussed some of the alternatives to system architecture for ACS" * NSA interested in ACS Assembly and Test Machine Oct. 10, 1966 handwritten notes from meeting re LRL RFP * discussion about bidding ACS "2 years ahead of time" ("no other choice within IBM") * "audit committee said no commitment until '68" * "Total ACS mkt - how sensitive to LRL bid" Feb. 9, 1967 RJ Creasy evaluation of ACS software system * "the designed system not only handles [compute-bound jobs] but is extended over a range of applicability heretofore unattainable" * "the design effort is still in a state of flux" N.D. (presumably Feb. 1967) J Backus evaluation of ACS software system * feels I/O rate is too low Feb. 10, 1967 comments on ACS for Palmer committee report March 6, 1967 handwritten notes on (?) proposal * ACS delivery in 3Q71 "200 MIPS" * IOP available in mid-68 * estimate of chip availability from Motorola * ACS circuit count estimates March 9, 1967 handwritten notes on circuit counts * estimate of 320K circuits March 15, 1967 handwritten notes on meeting with Pomerene March 15, 1967 handwritten notes and graphs on meeting with Amdahl April 3, 1967 handwritten notes on ACS presentation to Woods and Worlton (Los Alamos) * "12.5 ns cycle" * diagram of sequence unit showing contender stack * branching diagrams * discussion of OS May 1, 1967 Chen memo to Bertram on dual arithmetic for ACS-1 May 26, 1967 handwritten notes on ACS presentation to Palo Alto Sci Ctr * "ACS goal = 1000 x 7090" * "Permit execution of Several Instrs per cycle (up to 7)" * tables: LASL: DTF LRL: Hydro 7090 1 7090 1 6600 21 6600 50 M91 72 M91 110 ACS 1950 ACS 2500 July 12, 1967 D.A. Quarles memo on ACS performance estimates for weather prediction * ACS described as 160 MIPS, 512K word main store Dec. 13, 1967 handwritten notes on discussion with Amdahl * ACS compared to "NS6" (?) * Amdahl argues for 32 bit single precision flt pt * Amdahl points out that branching scheme need 14-21 instructions between prepare-to-branch and exit but that many codes have branching every four instructions * "one can look for branches a little early / gives most of gain" * "ACS could use fewer regs" * "competition - can't use this - satisfy growth of our customers" * "they plan to offer 2 instruction counters" N.D. (presumably Dec. 1967 or early in 1968) handwritten notes on partial copy of comments on ACS for Palmer comm * notes that only Amdahl has spent time considering S/360 compatibility March 13, 1968 memo from J.C. Porter to R.W. DeSio * "hot debate" March 18, 1968 memo from R.W. DeSio to J.H. Worthington * "dichotomy in the ACS group" March 18, 1968 handwritten notes on discussion with Amdahl and Earle * ACS - 7 circuit levels = 12.5 ns cycle time, CPU = 256K circuits (questions that 6 levels may be possible;"engrs. say they can't") * AEC - 5 circuit levels = 8 ns cycle time, CPU = 90K circuits * ACS - "too many functions / too many registers" * "hardware solns to branch + skip are better than software solns for short loops or 'tree' code" * "ACS spent their money on exotic cases" * "architecture buys ~9%" * "three address arith buys ~ 5% / more registers buys ~5%" * "AEC 2.5x better than ACD on 'dirty' code / 1.4x better on best case" * can run with current OS and then improve * "peak execution capability of AEC is higher than ACS, but neither have meaning / ACS 480 MIPS / AEC 500 MIPS" * "In terms of Mkt [ACS is] an enormous step backward" * ACS - "This is dead end + (we couldn't get our money back) / not reasonable argument" * "In Market Place: AEC 360 can go / can fulfill / can be profitable ... ACS can't" April 1, 1968 Bloch memo to file on large problem area questions April 16, 1968 memo from Paley to Bloch on large system strategy * "What is the purpose of a two-machine ACS effort?" May 1, 1968 memo from Chen to Bloch on possible improvements to S/360 arch * identifies three designs: ACS-1, ACS-200, AEC/360 May 14, 1968 memo from Chen to Bloch on CDC 7600