Mark Smotherman. Last updated September 2002.
The i960 is a 32-bit RISC architecture introduced in 1989. Features include:
g0-g3 - parameters 0-3 / return words 0-3
g4-g7 - parameters 4-7 / temporaries
g8-g12 - preserved across call if not used for parameters
g13 - structure return pointer
g14 - argument block pointer / leaf return address (hardware)
fp (g15) - frame pointer (hardware, aligned on 16-byte boundaries)
pfp (r0) - previous frame pointer (hardware)
sp (r1) - stack pointer (hardware)
rip (r2) - return instruction pointer (hardware)
r3-r15 - available as locals for subroutine
bal target - g14 <- return address;
PC <- target
bx (register) - PC <- register
call target - rip <- return address;
save r0-r15 to register cache (frame spill to
memory is handled by the hardware);
pfp <- fp;
fp <- sp {forced alignment on 16-byte boundary};
sp <- sp + 64;
PC <- target
ret - fp <- pfp;
restore r0-r15 from register cache (frame fill
from memory is handled by the hardware);
PC <- rip
...
... place parameters in g0-g7 ...
call subr
...
subr:
lda N(sp),sp ! adjust the stack pointer to
! allocate memory for locals
movq g0,r4 ! save input parameters in g0-g3
! into r4-r7
... body of subroutine ...
ret
subr: ! call entry
lda subr_ret,g14 ! set up "return"
_subr: ! bal entry
mov g14,g7 ! move "return address" to g7
... body of subroutine ...
mov 0,g14
bx (g7) ! branch either to return address
subr_ret: ! directly or to subr_ret
ret
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mark@cs.clemson.edu