Last updated: September 2007
... intro to be written ...
The term SIMD was originally defined in 1960s as category of multiprocessor with one control unit and multiple processing elements - each instruction is executed by all processing elements on different data streams, e.g., Illiac IV. Today the term is used to describe partitionable ALUs in which multiple operands can fit in a fixed-width register and are acted upon in parallel.
(other terms include subword parallelism, microSIMD, short vector extensions, split-ALU, SLP / superword-level parallelism, and SIGD / single-instruction-group[ed]-data)
The structure of the arithmetic element can be altered under program control. Each instruction specifies a particular form of machine in which to operate, ranging from a full 36-bit computer to four 9-bit computers with many variations. Not only is such a scheme able to make more efficient use of the memory in storing data of various word lengths, but it also can be expected to result in greater over-all machine speed because of the increased parallelism of operation. Peak operating rates must then be referred to particular configurations. For addition and multiplication, these peak rates are given in the following table: PEAK OPERATING SPEEDS OF TX-2 Word Lengths Additions Multiplications (in bits) per second per second 36 150,000 80,000 18 300,000 240,000 9 600,000 600,000
My thanks to Don Alpert for his help.
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