Receiver logic:

Receiver logic is driven by two descriptor queues:
   lrg_rd_ptr   -- Updated by RFred when a buffer is consumed
                   for a reception.
   lrg_wr_ptr   -- Updated by driver when a DMA completes and the
                   descriptor is returned to the free queue.

   Intially all buffers are free and lrg_rd_ptr = lrg_st_addr
                                     lrg_wt_ptr = lrg_ed_addr
   The queue is empty whenever       lrg_wt_ptr = lrg_rd_ptr


   pcq_rd_ptr   -- Updated by Driver when a packet is queued
                   for DMA.
   pcq_wr_ptr   -- Updated by RFred when a descriptor
                   is placed on the pcq.

   Initially the PCQ is empty and pcq_rd_ptr = pcq_wr_ptr