Tentative schedule subject to change

Date Topics Reading Assignment
08/24 Overview 5th ed: chp 1.1-3
Moore's law		  
08/29 Technologies, Performance and Power chp 1.4-6 HW1 assigned,
due Sept 7 before class
08/31 Performance and Power Chp 1.6-7  
09/05 Benchmarking Chp 1.8-11  
09/07 Combinational Logic B.1-4 HW1 due
HW2 assigned, due 9/14 before class
09/12 Canceled due to weather    
09/14 Adders B.5-6 HW2 due 9:29PM
HW3 assigned, due 9/21 before class
09/19 Sequential logic B.7-8  
09/21 Example devices and finite state machine B.10-11  
09/26 Exam I
09/28 MIPS Instructions and Datapath Chp4.1-3  
10/03 Exam Review & Datapath   Project 1 available
10/05 Pipeline Chp4.5-6  
10/10 Pipeline Hazards Chp4.7-8 HW4 assigned
10/12 Datapath with Floating Point & Branch Prediction supplementary materials
Chp4.8		  
10/17 Fall Break    
10/19 Instruction Level Parallelsim Chp4.10-11  
10/24 Real Examples Chp4.11-14  
10/26 Memory overview Chp5.1-3  
10/31 Basics of Caches Chp5.1-3  
11/02 Exam II    
11/07 Cache Performance Chp5.4  
11/09 Cache Performance Chp5.4  
11/14 Project Day   HW6 due
11/16 Cache Performance/Exam 2 review    
11/21 Virtual Memory Chp5.7, supplementary materials  
11/23 Thanksgiving Day    
11/28 Virtual Memory Chp5.7, supplementary materials  
11/30 Virtual Memory and replacement policy   HW7 due
12/05 Parallel Processors   Proj3 due
12/07 Chip Multiprocessing    
12/12 Examination week  
12/13 Final Exam (8:00-10:30am)    
12/14 Examination week